Dynamic Churning-Based Logic Locking for Enhanced Hardware Security

Title	Dynamic Churning-Based Logic Locking for Enhanced Hardware Security
Summary	This project aims to explore and implement advanced logic locking techniques to improve the security of integrated circuits (ICs) against modern attacks.
Keywords
TimeFrame
References
Prerequisites
Author	Mahdi Fazeli
Supervisor	Mahdi Fazeli
Level	Flexible
Status	Open

This project aims to explore and implement advanced logic locking techniques to improve the security of integrated circuits (ICs) against modern attacks. The focus will be on developing a dynamic locking mechanism that periodically reconfigures the key and logic gates during runtime to significantly increase the difficulty of reverse-engineering and key extraction attempts. By introducing unpredictability into the locking mechanism, the project will evaluate the robustness of the system in preventing sophisticated attacks, such as oracle-guided SAT attacks. The outcome of this research will contribute to stronger hardware security solutions for protecting intellectual property in global semiconductor supply chains.